HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 180

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 3 Memory Management Unit (MMU)
issued by a program in the P1 or P2 area. The operation of the LDTLB instruction is shown in
figure 3.12.
3.5.4
In an instruction access, the SH-4 searches the ITLB. If it cannot find the necessary address
translation information (i.e. in the event of an ITLB miss), the UTLB is searched by hardware, and
if the necessary address translation information is present, it is recorded in the ITLB. This
Rev.7.00 Oct. 10, 2008 Page 94 of 1074
REJ09B0366-0700
Entry 0
Entry 1
Entry 2
Entry 63
Entry specification
Hardware ITLB Miss Handling
PTEH
31
ASID [7:0]
ASID [7:0]
ASID [7:0]
ASID [7:0] VPN [31:10] V
MMUCR
31
VPN
LRUI
VPN [31:10]
VPN [31:10]
VPN [31:10]
Figure 3.12 Operation of LDTLB Instruction
10 9 8 7
26 25 24 23
—
—
V
V
V
URB
ASID
PPN [28:10]
PPN [28:10]
PPN [28:10]
PPN [28:10] SZ [1:0] SH C PR [1:0]
18 17 16 15
UTLB
—
Write
0
SZ [1:0]
SZ [1:0]
SZ [1:0]
URC
PTEL
PTEA
31
31
—
10 9 8 7
29 28
SH
SH
SH
SQMD
SV
C
C
C
PPN
PR [1:0]
PR [1:0]
PR [1:0]
—
10
—
— V SZ PR SZ C D SHWT
9 8 7 6 5 4 3 2 1 0
3 2 1 0
TI — AT
D
D
D
D WT
WT
WT
WT
SA [2:0]
SA [2:0]
SA [2:0]
SA [2:0] TC
4 3 2
TC
SA
TC
TC
TC
0