HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 875

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 17.7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
Pck (MHz)
7.1424
10.00
10.7136
16.00
20.00
25.0
30.0
33.0
50.0
The bit rate error is given by the following equation:
Table 17.8 shows the relationship between the smart card interface transmit/receive clock register
settings and the output state.
Table 17.8 Register Settings and SCK Pin State
Setting
1 *
2 *
3 *
Notes: 1. The SCK output state changes as soon as the CKE0 bit setting is changed.
1
2
2
2. Stopping and starting the clock by changing the CKE0 bit setting does not affect the
Error (%) =
SMIF
1
1
1
1
1
1
Clear the CKE1 bit to 0.
clock duty cycle.
GM
0
0
1
1
1
1
Register Values
1488 × 2
Maximum Bit Rate (bits/s)
19200
26882
28800
43010
53763
67204
80645
88710
67204
CKE1
0
0
1
0
0
1
2n – 1
Pck
× B × (N + 1)
CKE0
1
1
0
1
0
0
Output
Port
Low output
High output
× 10
6
Rev.7.00 Oct. 10, 2008 Page 789 of 1074
– 1 × 100
N
0
0
0
0
0
0
0
0
0
State
Determined by setting of SPB1IO
and SPB1DT bits in SCSPTR1
SCK (serial clock) output state
Low-level output state
SCK (serial clock) output state
High-level output state
SCK (serial clock) output state
Section 17 Smart Card Interface
SCK Pin
REJ09B0366-0700
n
0
0
0
0
0
0
0
0
0