HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 388

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 10 Clock Oscillation Circuits
10.8.2
The watchdog timer control/status register (WTCSR) is an 8-bit readable/writable register
containing bits for selecting the count clock and timer mode, and overflow flags.
WTCSR is initialized to H'00 only by a power-on reset via the RESET pin. It retains its value in
an internal reset due to WDT overflow. When used to count the clock stabilization time when
exiting standby mode, WTCSR retains its value after the counter overflows.
To write to the WTCSR register, use a word-size access with the upper byte set to H'A5. To read
WTCSR, use a byte-size access.
Bit 7—Timer Enable (TME): Specifies starting and stopping of timer operation. Clear this bit to
0 when using the WDT in standby mode or to change a clock frequency.
Bit 7: TME
0
1
Bit 6—Timer Mode Select (WT/IT): Specifies whether the WDT is used as a watchdog timer or
interval timer.
Bit 6: WT/IT
0
1
Note: The up-count may not be performed correctly if WT/IT is modified while the WDT is running.
Rev.7.00 Oct. 10, 2008 Page 302 of 1074
REJ09B0366-0700
Initial value:
Watchdog Timer Control/Status Register (WTCSR)
R/W:
Bit:
Description
TME
Up-count stopped, WTCNT value retained
Up-count started
Description
Interval timer mode
Watchdog timer mode
R/W
7
0
WT/IT
R/W
6
0
RSTS
R/W
5
0
WOVF
R/W
4
0
IOVF
R/W
3
0
CKS2
R/W
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0