LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 134

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LFXP2-17E-5FN484I

Manufacturer Part Number
LFXP2-17E-5FN484I
Description
FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFXP2-17E-5FN484I

Number Of Macrocells
17000
Number Of Programmable I/os
358
Data Ram Size
282624
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
282624
Number Of I /o
358
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice
Quantity:
175
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Table 9-7. User Parameters in the IPexpress GUI
Lattice Semiconductor
Figure 9-9. LatticeXP2 PLL Configuration Tab
Table 9-7 describes the user parameters in the IPexpress GUI and their usage.
Frequency Mode
Divider Mode
CLKI
CLKFB
PLL Phase & Duty Options
User Parameters
Frequency
Divider
Feedback Mode
Divider
None
Static Mode
Dynamic Mode
User desired CLKI and CLKOP frequency
User desired CLKI frequency and dividers
settings
Input Clock frequency
Input Clock Divider Setting (Divider Mode)
Feedback Mode
Feedback Clock Divider Setting (Divider
Mode)
No Phase & Duty Options
CLKOS Phase/Duty in Static Mode
CLKOS Dynamic Mode Phase/Duty 
Setting
CLKOS Duty Trimming
CLKOP Duty Trimming
9-12
Description
LatticeXP2 sysCLOCK PLL
Design and Usage Guide
Internal, CLKOP,
User Clock
10 MHz to
435 MHz
ON/OFF
ON/OFF
ON/OFF
ON/OFF
ON/OFF
ON/OFF
ON/OFF
Range
1 to 43
1 to 43
100 MHz
Default
CLKOP
OFF
OFF
OFF
OFF
OFF
ON
ON
1
1

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