LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 314

• Manufacturer Part Number: LFXP2-17E-5FN484I
• Description: FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-17E-5FN484I

• Number Of Macrocells: 17000
• Number Of Programmable I/os: 358
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 282624
• Number Of I /o: 358
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Table 16-8. SED Run Time
Sample Code
The following simple example code shows how to instantiate the SED. In the example the SED is always on and
always running, and the outputs of the SED hardware have been routed to FPGA output pins. Note that the SEDBA
primitive is part of ispLEVER 6.1 or later.
Basic SED VHDL Example
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity example is
end;
architecture behavioral of example is
end behavioral ;
port (
component
end component;
begin
generic (OSC_DIV : integer := 1); -- set SEDCLKIN divider
port (
isnt1: SEDBA
generic map (OSC_DIV=> “1”)
port map (
sed_done
sed_in_prog
sed_clk_out
sed_out
SEDENABLE
SEDSTART
SEDFRCERRN
SEDERR
SEDDONE
SEDINPROG
SEDCLKOUT
SEDENABLE
SEDSTART
SEDFRCERRN
SEDERR
SEDDONE
SEDINPROG
SEDCLKOUT
SEDBA -- SED component
Density
3.1MHz
2.5MHz
Device
66MHz
50MHz
: out std_logic;
: out std_logic;
: out std_logic;
: out std_logic);
: in std_logic;
: in std_logic;
: in std_logic;
: out std_logic;
: out std_logic;
: out std_logic;
: out std_logic) ;
=> '1',
=> '1',
=> '1',
=> sed_out,
=> sed_done,
=> sed_in_prog,
=> sed_clk_out ) ;
XP2-5K
1.236M
18.7ms
24.7ms
399ms
495ms
-- tied high
-- tied high
-- tied high
-- wired to an output
-- wired to an output
XP2-8K
1.954M
29.6ms
39.1ms
624ms
782ms
-- wired to an output
16-6
-- wired to an output
XP2-17K
3.636M
55.1ms
72.7ms
1.173s
1.455s
XP2-30K
119.3ms
5.964M
90.4ms
1.924s
2.395s
Detection Usage Guide
XP2-40K
126.2ms
166.1ms
8.304M
2.679s
3.325s
LatticeXP2 Soft Error