LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 323

• Manufacturer Part Number: LFXP2-17E-5FN484I
• Description: FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-17E-5FN484I

• Number Of Macrocells: 17000
• Number Of Programmable I/os: 358
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 282624
• Number Of I /o: 358
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
This document provides detail technical explanation of the dual boot feature in the LatticeXP2 device family. The
application details for using ispVM and ispVME to support dual boot feature during the different applications is as
follows:
The application of the LatticeXP2 Advanced Security feature, TransFR feature, and Mission Critical Field Upgrade
are briefly mentioned in this document. The details can be found in the LatticeXP2 Advanced Security Configura-
tion, LatticeXP2 TransFR Feature, and LatticeXP2 Mission Critical Field Upgrade Usage Guides, respectively. Con-
tact Lattice Applications for the other documents if required.
Note: The LatticeXP2 devices only support encrypted JEDEC files, which target the embedded Flash of the
LatticeXP2 devices.
Figure 17-4. LatticeXP2 FPGA Dual Boot Feature Flow Diagram
Resource
The minimum SPI Flash density required to support the dual boot feature is listed in Table 17-1.
Table 17-1. Required SPI Flash Device Size
1. Use ispVM or ispVME to program the bitstream into the SPI Flash device
2. Use ispVM or ispVME to program the JEDEC file into the LatticeXP2 device.
Block 0 (0x000000)
CRC OK?
XP2-5
XP2-8
XP2-17
XP2-30
XP2-40
Device Name
Yes
Continue Until Entire
Bitstream Loaded.
No
Fail
Bitstream Size
External SPI Flash
Embedded Flash
Holding the Current
New Pattern
M bits
Golden Pattern
1.28
1.99
3.55
5.79
8.04
Unused Area
Send block 0 Address.
Select the SPI Flash.
Sen Read Opcode.
17-5
Minimum SPI Flash Density
Load Current or
New Pattern In
M bits
16
2
2
4
8
No
LatticeXP2 Dual Boot Feature
Dual Boot Flow
Embedded Flash
Download from
Programmed?
Done Fuse
Wake-Up
Start
Pass
Yes