EP3C10M164C8N Altera, EP3C10M164C8N Datasheet - Page 122

• Manufacturer Part Number: EP3C10M164C8N
• Description: IC CYCLONE III FPGA 402MHZ BGA-164
• Manufacturer: Altera
• Series: Cyclone IIIr

Specifications of EP3C10M164C8N

• No. Of Logic Blocks: 645
• Family Type: Cyclone III
• No. Of I/o's: 106
• I/o Supply Voltage: 3.3V
• Operating Frequency Max: 402MHz
• Operating Temperature Range: 0°C To +85°C
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 10320
• # I/os (max): 106
• Frequency (max): 402MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 10320
• Ram Bits: 423936
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 164
• Package Type: MBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6–22
Table 6–7. Chapter Revision History (Part 2 of 3)
Cyclone III Device Handbook, Volume 1
May 2008
Date
Version
2.0
Changes include addition of BLVDS information.
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Added an introduction to “I/O Element Features” section.
Updated “Slew Rate Control” section.
Updated “Programmable Delay” section.
Updated Table 6–1 with BLVDS information.
Updated Table 6–2.
Updated “PCI-Clamp Diode” section.
Updated “LVDS Transmitter Programmable Pre-Emphasis” section.
Updated “On-Chip Termination with Calibration” section and added new
Figure 6–9.
Updated Table 6–3 title.
Updated Table 6–4 unit.
Updated “I/O Standards” section and Table 6–5 with BLVDS information and
added (Note 5).
Updated “Differential I/O Standard Termination” section with BLVDS
information.
Updated “I/O Banks” section.
Updated (Note 2) and added (Note 7) and BLVDS information to
Figure 6–15.
Updated (Note 2) and added BLVDS information to Table 6–6.
Added MBGA package information to Table 6–7.
Deleted Table 6-8.
Updated “High-Speed Differential Interfaces” section with BLVDS
information.
Updated “Differential Pad Placement Guidelines” section and added new
Figure 6–16.
Updated “V
Figure 6–17.
Updated Table 6–11.
Added new “DCLK Pad Placement Guidelines” section.
Updated “DC Guidelines” section.
REF
Pad Placement Guidelines” section and added new
Chapter 6: I/O Features in the Cyclone III Device Family
Changes Made
© December 2009 Altera Corporation
Chapter Revision History