EP3C10M164C8N Altera, EP3C10M164C8N Datasheet - Page 134
EP3C10M164C8N
Manufacturer Part Number
EP3C10M164C8N
Description
IC CYCLONE III FPGA 402MHZ BGA-164
Manufacturer
Altera
Series
Cyclone IIIr
Specifications of EP3C10M164C8N
No. Of Logic Blocks
645
Family Type
Cyclone III
No. Of I/o's
106
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Family Name
Cyclone III
Number Of Logic Blocks/elements
10320
# I/os (max)
106
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
10320
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
164
Package Type
MBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7–10
RSDS, Mini-LVDS, and PPDS I/O Standard Support in the Cyclone III Device Family
Figure 7–5. Cyclone III Device Family RSDS, Mini-LVDS, or PPDS Interface with True Output Buffer on the Left and Right I/O
Banks
Cyclone III Device Handbook, Volume 1
f
f
The RSDS, mini-LVDS, and PPDS I/O standards are used in chip-to-chip applications
between the timing controller and the column drivers on the display panels such as
LCD monitor panels and LCD televisions. The Cyclone III device family meets the
National Semiconductor Corporation RSDS Interface Specification, Texas Instruments
mini-LVDS Interface Specification, and National Semiconductor Corporation PPDS
Interface Specification to support RSDS, mini-LVDS and PPDS output standards,
respectively.
For more information about the Cyclone III device family RSDS, mini-LVDS, and
PPDS output electrical specifications, refer to the
Cyclone III LS Device Data Sheet
For more information about the RSDS I/O standard, refer to the RSDS specification
from the National Semiconductor website (www.national.com).
Designing with RSDS, Mini-LVDS, and PPDS
Cyclone III device family I/O banks support RSDS, mini-LVDS, and PPDS output
standards. The left and right I/O banks support true RSDS, mini-LVDS, and PPDS
transmitters. On the top and bottom I/O banks, RSDS, mini-LVDS, and PPDS
transmitters are supported using two single-ended output buffers with external
resistors. The two-single ended output buffers are programmed to have opposite
polarity.
Figure 7–5
Cyclone III Device Family
True RSDS, Mini-LVDS,
or PPDS Transmitter
shows a RSDS, mini-LVDS, or PPDS interface with a true output buffer.
Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
50
chapters.
50
100
Cyclone III Device Data Sheet
RSDS, Mini-LVDS,
or PPDS Receiver
© December 2009 Altera Corporation
High-Speed I/O Standards Support
and
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