IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 111

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Network Processor Firmware—IXB2850
9.4.1
9.4.2
January 2007
Document Number: 05-2443-006
Hardware Initialization
The first operation performed by the Boot Monitor is basic hardware component
initialization and tests. These operations constitute a short Power On Self Test set. The
Boot Monitor initializes and performs basic tests on all hardware components that do
not contain a dedicated Linux driver, performs reinitialization during Linux startup and
performs other tasks that are essential for Boot Monitor work. The hardware
initialization tasks include:
After the basic hardware initialization, the Boot Monitor establishes connection with the
BMC over a UART connection and sends to the BMC the “Boot started” IMPI event
message (see
event informs the BMC that the NPU is currently running the Boot Monitor.
FRU Information Retrieval
The Boot Monitor is responsible for retrieving, from the BMC, “FRU Information” about
each hardware module on the IXB2850 board. This information is used by the Boot
Monitor to properly initialize and test baseboard and extension cards. FRU Information
is also stored in EEPROM memory for future use by the Linux operating system (see
Section 9.7, “Baseboard Driver” on page
FRU Information contains records describing the MAC addresses for all blade Ethernet
devices. The Boot Monitor verifies the MAC addresses configured in board Ethernet
devices (CS8900 and 82546 Dual Port Gigabit Ethernet Controller) with the contents of
FRU Information at every startup and changes a device’s configuration if MAC
addresses has been modified.
One of the baseboard FRU Information MultiRecord entries contains NPU boot
parameters. If the Boot Monitor detects a new boot parameters definition (a dedicated
flag in this record – see
page 48
Monitor Config) stored in flash memory with the content of the appropriated FRU
Information record and modifies the Boot Monitor Config Status Word to run the new
Boot Monitor Configuration in “safe mode” (see Section
• DRAM memory controller initialization
• Scratchpad memory test
• DRAM memory test – limited fragment of DRAM, used by Boot Monitor, is tested
• DRAM scrubbing, ECC enabling
• SRAM memory controller initialization
• PCI bus initialization
• Standard RedBoot initialization procedure, including:
with pattern tests of each memory location within tested area
— PHY driver – a driver for the Marvell* Alaska 1011 Gigabit Ethernet PHY. This
— Crosspoint driver – a driver for the Analog Devices* AD8152 crosspoint switch.
— 16550 UART device initialization
— Flash initialization
— Debug Ethernet (CS8900A) controller
PHY is one of several devices connecting the 82546 Dual Port Gigabit Ethernet
Controller to the AdvancedTCA base interface.
This switch has direct connection to the AdvancedTCA base interface and
should be properly configured to allow the 82546 Dual Port Gigabit Ethernet
Controller to connect to the base interface.
for details), it modifies the non-active set of NPU boot parameters (Boot
Table 52, “IPMI event data for boot class” on page 116
Section 4.6.2.5, “Processors Boot Parameters Record” on
128).
Intel NetStructure
Section 11.2.2.2, “Image
®
IXB2850 Packet Processing Boards
for details). This
TPS
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