IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 74

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

6.0
6.1
Note:
6.2
Intel NetStructure
TPS
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®
Installation and Configuration
Operating Environment
IXB2850 boards are designed to operate in a chassis that conforms to the
AdvancedTCA* (PICMG* 3.x) standards. The chassis consists of the following
components:
IXB2850 boards can operate in a chassis that is not compliant with AdvancedTCA,
where the ShMC is not present. To make this possible, there is a dedicated hardware
jumper on the baseboard that defines whether the BMC should communicate with the
ShMC. The chassis does not need to be equipped with Ethernet switches for backplane
connections. It is possible to use point-to-point Ethernet connections between two
boards. IXB2850 boards do not need to know whether the backplane is switched or not.
Hardware Configuration
IXB2850 boards include a number of hardware-configurable components such as
jumpers and switches. See
preset during manufacturing and generally should not need to be changed. When
upgrading firmware, specifically when upgrading FRU Information, SDRs and CPLDs,
specific jumpers and switches need to be set; see
Upgrade Procedure” on page 137
following subsections describe the default settings of the jumpers and switches so that
they can be reset to default settings if necessary.
• Two redundant Shelf Management Controllers (ShMCs)
• Two redundant Switch Fabrics boards
• Backplane, which includes the following interfaces within the confines of a slot
IXB2850 Packet Processing Boards
designed for an IXB2850 board:
— Intelligent Platform Management Bus (IPMB)
— Base Interface (connecting each board with both Switch Fabric boards)
— Fabric Interface (connecting each board with both Switch Fabric boards)
— Clock Interface
— Update Interface
A dual I
There is a separate channel per connection with a particular Switch Fabric. Each
channel constitutes a single Ethernet port (1000BASE-T). This interface is
dedicated for control traffic in the PICMG 3.1 configuration and is shared by
both control and data traffic in the PICMG 3.0 configuration.
There is a separate channel per connection with a particular Switch Fabric. Each
channel constitutes four Gigabit Ethernet (fiber) ports (1000BASE-CX). This
interface is dedicated to data traffic in the PICMG 3.1 configuration.
A source of the reference clock for the IXB2850 board
A five channel interface
2
C bus connecting the ShMCs with each board in the chassis.
Figure 27
and its subsections for more information. The
for locations. These jumpers and switches are
Section 11.3.1, “Local Software
IXB2850—Installation and Configuration
Document Number: 05-2443-006
January 2007