IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 236

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

C.1.17
C.2
C.2.1
Intel NetStructure
TPS
236
®
The test cases presented in the following table are performed on all ports of tested
device.
The user can specify:
Telecom Clock Tests
The Telecom Clock tests perform the Telecom Clocks (Zarlink*) functionality
verification. This test generates known frequencies and verifies if the Zarlink
synchronizes with the reference clock. The tests cases presented in the following table
are executed.
The user can specify how many times the test is performed (the default is 1).
Diagnostics Commands
The supported diagnostics commands are described in the following subsections. For
information on using the diagnostics commands, see
Diagnostics” on page
banner
Print a banner containing basic hardware and software information.
Test ID
00h
01h
02h
03h
04h
03h
04h
Test ID
00h
01h
02h
03h
04h
• Traffic type – single packet, packet burst or continuous
• Tested port
• Interface speed
• Interface mode
IXB2850 Packet Processing Boards
— Quad Gigabit Ethernet Mezzanine ports
— FIC Gigabit Ethernet port
— Baseboard Gigabit Ethernet port
— 10Mbps, 100Mbps and 1Gbps for Ethernet (on backplane is only, 1Gbps)
— Full duplex, half duplex for Ethernet
Description
MAC/Framer device configuration
MAC/Framer port configuration
Traffic test on system loopback on MAC/Framer ports
PHY/Serdes port configuration
Traffic test on system loopback on PHY/Serdes ports
External port configuration
Traffic test on external loopback
Description
Telecom Clock device board presence checking
2.048 MHz frequency test
19.44 MHz frequency test
8 kHz frequency test
1.544 MHz frequency test
79.
Section 6.9.1, “Running the
Document Number: 05-2443-006
IXB2850—Diagnostics
January 2007