IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 43

• Manufacturer Part Number: IXB28504XGBEFS
• Manufacturer: Intel

Specifications of IXB28504XGBEFS

• Lead Free Status / Rohs Status: Compliant

Hardware Management—IXB2850
4.5.4
Note:
4.5.5
4.6
January 2007
Document Number: 05-2443-006
BMC Reset
The BMC can be reset for the following reasons:
These resets do not affect the NPU and overall board power-up.
BMC Watchdog
The BMC is protected from firmware failures by a watchdog timer mechanism. The BMC
watchdog has an interval of 200 ms, is implemented in the CPLD, and is controlled by
the firmware over the slow port interface.
The BMC watchdog is enabled during BMC startup and is constantly kicked by the BMC
firmware; it is never disabled.
The BMC watchdog timer is compliant with the IPMI 1.5 specification (see Chapter 21.
BMC Watchdog Timer Commands). IXB2850 boards support these commands as
indicated in
Steps for using the watchdog timer are:
The “Set Watchdog Timer” command is also used for stopping the timer and clearing
“Timer Use Expiration flags”.
The “Get Watchdog Timer” and “Get Sensor Reading” commands retrieve the current
setting of the watchdog timer.
The “Re-arm Sensor events” command clears watchdog events status and stops the
watchdog timer.
FRU Inventory
IXB2850 boards consist of a number of mandatory and optional hardware modules.
Each module, called a Field Replaceable Unit (FRU), contains ID EEPROM devices that
store the FRU information. The BMC has access to these ID EEPROM devices over the
I
2
1. “Set Watchdog Timer” - This command is used for initializing and configuring the
2. “Reset Watchdog Timer” - This command is used for starting the watchdog timer
3. Repeat “Reset Watchdog Timer” for restarting the watchdog timer from the initial
• An operator-initiated BMC reset
• The BMC watchdog resets
• IXB2850 baseboard
• Intel
• Quad Gigabit Ethernet Mezzanine Card
C bus. The BMC supports the following hardware modules:
The software reset is performed on operator request (for example, after a firmware
upgrade).
The BMC is reset by the watchdog mechanism in the aftermath of a software hang.
To capture this kind of reboot, the BMC handles a special watchdog reset flag in
the EEPROM. This flag is set after the BMC POST and cleared before every reset
performed under BMC control.
watchdog timer.
from the initial countdown value that was specified in the “Set Watchdog Timer”
command.
countdown value that was specified in the “Set Watchdog Timer” command.
®
IXP2850 network processor module
Section 8.2.1, “IPMI 1.5 Command Support” on page
Intel NetStructure
®
IXB2850 Packet Processing Boards
90.
TPS
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