IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 253

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Diagnostics—IXB2850
C.2.32
C.2.33
January 2007
Document Number: 05-2443-006
Example
t pci i
t slowport
Perform slow port tests.
Syntax
t slowport option loop
Parameters
Example
t slowport d
t uart
Perform UART tests. The test cover all types of UART in the system. User intervention is
required to finish the test.
Syntax
t uart command uart_id
Parameters
• bridges- specifies the number of PCI bridges. Can be set as follows:
• AP_presence- indicates if an Adjunct Processor (AP) mezzanine card is present at
• option- indicates the test to perform. Can be set as follows:
• loop- specifies the number of times the test is performed (default is 1)
• command- indicates a test method to perform. Can be set as follows:
the PMC site. Can be set as follows:
— i- PCI interrupt test
— a- all PCI tests
— h- help
— b1- search for one PCI bridge (default)
— b2- search for two PCI bridges
— 0 - AP is not present (default)
— 1 - AP is present
— d- Slow port register default test
— r- Slow port register write-read test
— a- all slow port tests
— h- help
— d- dump all UART readable registers
— r- UART register test
— l- UART loopback test (if uart_id is not equal to 1)
— q- UART non-FIFO polling test (if uart_id is not equal to 2)
Intel NetStructure
®
IXB2850 Packet Processing Boards
TPS
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