IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 45

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Hardware Management—IXB2850
4.6.2
Table 6.
4.6.2.1
Note:
January 2007
Document Number: 05-2443-006
FRU Information Format
The contents of FRU Information are specified in the IPMI Platform Management FRU
Information Storage Definition. See also the PICMG 3.0 specification (Section 3.6) for
more information. FRU Information can be read using the FRU read IPMI command. All
of the FRU Information is read/write and is upgradable by the customer.
Table 6
records in the MultiRecord area. FRU Information areas always appear in the order
shown in
FRU information layout
The MultiRecord Area is used by IXB2850 boards as storage for the following
parameters:
The following sections contain detailed descriptions for all these records in the
MultiRecord Area.
PICMG Point-to-Point Connectivity Record
This record contains a description of the AdvancedTCA backplane interfaces supported
by a given hardware module. The format of this record is defined by the PICMG 3.0
specification. The contents of the Point-to-Point Connectivity Records for the IXB2850
board are described in de tail in
page
Prioritized Point-to-Point Connectivity Records are included for FRU 0. This enables
support for the Electronic Keying mechanism (PICMG 3.0 options 1, 2 and 3) with
Chassis Management Modules (CMMs) that are not fully standard compliant.
Area
Common Header
Internal Use Area
Chassis Info Area
Board Info Area
Product Info Area
MultiRecord Area
PICMG Point-to-Point Connectivity Record
supported by a given hardware module
MAC Addresses Record
Sensor Devices Record
Memory Amount Record
Processors Boot Parameters Record
101.
shows the layout of the FRU Information, including the positioning of the
Table
6.
– Ethernet interface MAC address definition
– A sensor device description
– A memory amount definition
Record 1
Record 2
...
Record x
Section 8.4.2, “Point-to-Point Connectivity Records” on
- BMP and NPU boot parameters
Intel NetStructure
– A description of backplane interfaces
Comment
Mandatory
Optional
Optional
Optional
Optional
Optional
Optional
...
Optional
®
IXB2850 Packet Processing Boards
TPS
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