IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 8

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
Revision History
Intel NetStructure
TPS
8
®
Date
January 2007
February 2006
January 2006
December 2005
September 2005
June 2005
IXB2850 Packet Processing Boards
Revision
006
005
004
003
002
001-01
Description
Updates to coincide with the introduction of new SKUs and the SRA 2.1
software release.
In Section 11.3.1, “Local Software Upgrade Procedure”, added a
statement to check the Release Notes for a list of the components to be
upgraded for a specific release.
In Section 11.3.1, “Local Software Upgrade Procedure”, and
subsections, substituted specific release version references with
“<release_version>” to make the procedure generic.
Updated Section 11.3.1.5, “Upgrading the BMC Starter”, step 2 and
step 7 to show more current versions of the IPMI Controller Dual Image
and CPLD.
Updated Section 4.6.2.1, “PICMG Point-to-Point Connectivity Record” to
include a note about prioritized point-to-point connectivity records in
FRU 0.
Updated Section 8.4.2.2, “FIC Point-to-Point Connectivity Record”.
Updated Section 8.5, “Board UART Configuration” and Section 8.5.1,
“UART Hardware Configuration” to describe differences between spin
3A and spin 4 boards. Deleted Section 8.5.2, “UART Software
Configuration”, since this functionality is not supported.
In Table 35, “IPMI 1.5 Command Support “ updated “Add SDR” entry to
indicated that it is supported by the BMC.
Added Section 12.8, “Weight”.
Updates to CPLD, FRU Information and SDR upgrade procedures and
instructions for running diagnostics. Updates to Media Access Module
functional description. Baseboard SW1 DIP switch description
correction. Removal of references to Real Time Clock (RTC).
Supports production release (SRA) boards.
Draft of doc to support trial release.
Document Number: 05-2443-006
IXB2850—Contents
January 2007