IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 28

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
3.2.1
Figure 8.
Intel NetStructure
TPS
28
®
Media Access Module
The Media Access Module is used to split the IXP2850 SPI-4 bus into four SPI-3/UTOPIA
buses utilized by the Quad Gigabit Ethernet Mezzanine Card, FIC, and on-board
IXF1104 chip. The block diagram of the Media Access Module is shown in
Media Access Module block diagram
The main component of the Media Access Module is the SPI-3/4 Bridge chip, which
supports three peripheral SPI-3/UTOPIA buses. The SPI-3/4 Bridge chip is a bridge type
device. It does not allow switching of traffic directly between peripheral buses; all
traffic is bound to or from the network processor, and any switching between peripheral
buses, if required, must be implemented in the network processor. The bridge appears
as a 12-port PHY device to the network processor:
• 21154 chip - Two PCI bridges configurable through the PCI bus.
• 10Eth - A 10 Mbps Ethernet Controller (CS8900A) that is connected to the NP and
• UARTs - Includes a dual UART device (16C550) dedicated to the NP, one is used for
• NP Flash - 160 MB accessible through the slow port. The flash memory available
• Each of these 12 ports is dedicated to one of three peripheral SPI-3 buses (one bus
• The port numbers (0 to 11) determine which peripheral bus the packet came from
IXB2850 Packet Processing Boards
This module consists of an SPI-3/4 Bridge chip and Fork FPGA and is configurable
through the slow port. See
used for debug purposes (console and debug support). This chip is fully managed
(including packet transmission and reception) through the slow port.
debug support, and one for communication with the Board Management Controller
(BMC). There is also a third UART port embedded in the IXP2850 network processor
that is used as an NP console.
for the NP is split into five banks of 32 MB each (2 x 16 MB) due to limited NP slow
port addressing capabilities. One bank is mounted on the NP module and the
remaining four banks are mounted on the baseboard.
is split in the FPGA)
or goes to
(IXB28504XGBEFSx
Gigabit Ethernet
Mezzanine Card
boards only)
Card (FIC)
Interface
Quad
Fabric
SPI-3/UTOPIA
UTOPIA
SPI-3/
Media Access Module
Network Processor
SPI-3/UTOPIA
Section 3.2.1
Bus Fork
IXP2850
SPI-3/4
Bridge
FPGA
SPI-4
below.
SPI-3/UTOPIA
SPI-3/UTOPIA
Baseboard
(Not Used)
IXF1104
MAC on
DB #1
IXB2850—Hardware Overview
Document Number: 05-2443-006
Figure
January 2007
8.