IXB28504XGBEFS Intel, IXB28504XGBEFS Datasheet - Page 252

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IXB28504XGBEFS

Manufacturer Part Number
IXB28504XGBEFS
Description
Manufacturer
Intel
Datasheet

Specifications of IXB28504XGBEFS

Lead Free Status / Rohs Status
Compliant
C.2.30
C.2.31
Intel NetStructure
TPS
252
®
Example
t mem a a
t msf
Perform MSF tests.
Syntax
t msf option loop
Parameters
Example
t msf d
t pci
Perform PCI tests. The tests check if all requested PCI devices are present and PCI
interrupts can be generated.
Syntax
t pci option bridges AP_presence
Parameters
• start_addr- memory address where the test should begin
• size- number of bytes to test starting from start_addr
• data- data used for patter test (mandatory for the pattern (p) test)
• loops- specifies the number of times a test is performed (default value is 1)
• verbose- sets the verbose level for the test. This setting is only valid during the
• option- indicates the test to perform. Can be set as follows:
• loop- specifies the number of times the test is performed (default is 1)
• option- indicates the test to perform. Can be set as follows:
IXB2850 Packet Processing Boards
initial execution of a looped command.
— c- both checker test
— u- unique test
— b- address bus test
— p- pattern test (a value for data is required)
— i- incremental test
— e- ECC test (only applicable to DRAM)
— a- all tests
— d- MSF register default test
— r- MSF register write-read test
— a- all MSF tests
— h- help
— p- PCI presence test
Document Number: 05-2443-006
IXB2850—Diagnostics
January 2007