PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 118

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
2. Terminal Transmits D-Channel Data Upstream
The initial state is identical to that described in the last paragraph. When one of the
connected S-bus terminals needs to transmit in the D-channel, access is established
according to the following procedure:
• SBCX-X S-transceiver (in intelligent NT) recognizes that the D-channel on the S-bus
• SBCX-X S-transceiver transfers S-bus D-channel data transparently through to the
For both cases described above the exchange indicates via the A/B bit (controlled by
layer 1) that D-channel transmission on this line is permitted (A/B = “1”). Data
transmission could temporarily be prohibited by the exchange when only a single
D-channel controller handles more lines (A/B = “0”, ELIC-concept).
In case the exchange prohibits D data transmission on this line the A/B bit is set to “0”
(block). For U
transceiver to transmit an inverted echo channel on the S-bus, thus disabling all terminal
requests, and switches S/G to A/B, which blocks the D-channel controller in the
intelligent NT.
Note: Although the SBCX-X S-transceiver operates in LT-S mode and is pinstrapped to
Figure 63
Data Sheet
is active.
upstream IOM-2 bus (IOM-2 channel 0).
TE
TE
TE
IOM-2 channel 0 or 1 it will write into IOM-2 channel 2 at the S/G bit position.
D-channel
E-channel
PN
Data Flow for Collision Resolution Procedure in Intelligent NT
applications with S extension this forces the intelligent NT SBCX-X S-
SBCX-X
D
BAC
D
S/G
A/B
(e.g. ICC PEB2070)
S
controller 2
(TE mode timing)
D-channel
S/G
118
controller 1
D-channel
D
D
D
D
BAC
Description of Functional Blocks
IOM
TBA
DU
DD
Masterdevice,
e.g. IEC-Q TE
transceiver
IOM-2
U
3081_03
PEB 3081
PEF 3081
2000-09-27
Exchange