PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 135

PEB3081FV14XP

Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3081FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Preliminary
4.1.5
Value after reset: FE
CIX1
CODX1 ... C/I-Code 1 Transmit
Bits 7-2 of C/I-channel 1 timeslot.
CICW... C/I-Channel Width
CICW selects between a 4 bit (’0’) and 6 bit (’1’) C/I1 channel width.
The C/I1 handler always reads and writes 6-bit values but if 4-bit is selected, the higher
two bits are ignored for interrupt generation. However in write direction the full CODX1
code is transmitted, i.e. the host must write the higher two bits to “1”.
CI1E ... C/I-Channel 1 Interrupt Enable
Interrupt generation ISTA.CIC of CIR0.CIC1 is enabled (1) or masked (0).
4.1.6
Value after reset: 01
TR_
CONF0
DIS_TR ... Disable Transceiver
Setting DIS_TR to “1” disables the transceiver. In order to reenable the transceiver
again, a transceiver reset must be issued (SRES.RES_TR = 1). The transceiver must
not be reenabled by setting DIS_TR from “1” to “0”.
For general information please refer to
BUS ... Point-to-Point / Bus Selection (NT/LT-S/Int. NT mode only)
0: Adaptive Timing (Point-to-Point, extended passive bus).
1: Fixed Timing (Short passive bus).
Data Sheet
7
7
CIX1 - Command/Indication Transmit 1
TR_CONF0 - Transceiver Configuration Register 0
DIS_
TR
BUS
H
H
EN_
ICV
CODX1
0
Chapter
135
L1SW
3.3.9.
0
Detailed Register Description
CICW CI1E
EXLP
0
0
LDD
RD/WR (30)
PEB 3081
PEF 3081
2000-09-27
WR (2F)

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