PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 162

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

PEB 3081
PEF 3081
Detailed Register Description
Preliminary
4.3.14
SDS_CONF - Configuration Register for Serial Data Strobes
Value after reset: 00
H
7
0
SDS_
0
0
0
0
DIOM_
DIOM_
SDS2_
SDS1_
RD/WR (5A)
CONF
INV
SDS
BCL
BCL
For general information on SDS1/2_BCL please refer to
Chapter
3.7.2.
DIOM_INV ... DU/DD on IOM Timeslot Inverted
0: DU/DD are active during SDS1 HIGH phase and inactive during the LOW phase.
1: DU/DD are active during SDS1 LOW phase and inactive during the HIGH phase.
This bit has only effect if DIOM_SDS is set to ’1’ otherwise DIOM_INV is don’t care.
DIOM_SDS ... DU/DD on IOM Controlled via SDS1
0: The pin SDS1 and its configuration settings are used for serial data strobe only. The
IOM-2 data lines are not affected.
1: The DU/DD lines are deactivated during the High/Low phase (selected via
DIOM_INV) of the SDS1 signal. The SDS1 timeslot is selected in SDS1_CR.
SDSx_BCL ... Enable IOM Bit Clock for SDSx
0: The serial data strobe is generated in the programmed timeslot.
1: The IOM bit clock is generated in the programmed timeslot.
Data Sheet
162
2000-09-27