PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 31

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
Header 41
This sequence allows in front of the A-D-D-D write access a non-interleaved A-D-A-D
read access. This mode is useful for reading status information before writing to the
HDLC XFIFO. The termination condition of the read access is the reception of the wradr.
The sequence can have any length and is terminated by the rising edge of CS.
Example for a read/write access with header 41
Header 49
This sequence allows in front of the A-D-D-D write access an interleaved A-D-A-D read
access. This mode is useful for reading status information before writing to the HDLC
XFIFO. The termination condition of the read access is the reception of the wradr. The
sequence can have any length and is terminated by the rising edge of the CS line.
Example for a read/write access with header 49
Data Sheet
SDR header rdadr
SDX
SDR header rdadr
SDX
H
H
: Non-interleaved A-D-D-D Sequence
: Interleaved A-D-D-D Sequence
rddata
rddata rddata
rdadr
wradr wrdata
rdadr
31
rddata
(wradr)
H
H
:
:
wrdata
wradr wrdata
Description of Functional Blocks
(wradr)
wrdata
(wradr)
(wradr)
wrdata
(wradr)
PEB 3081
PEF 3081
wrdata
2000-09-27
(wradr)