PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 163

PEB3081FV14XP

Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3081FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Preliminary
4.3.15
Value after reset: FF
MCDA
MCDAxy ... Monitoring CDAxy Bits
Bit 7 and Bit 6 of the CDAxy registers are mapped into the MCDA register.
This can be used for monitoring the D-channel bits on DU and DD and the ’Echo bits’ on
the TIC bus with the same register
4.3.16
Value after reset: FF
MOR
Contains the MONITOR data received in the IOM-2 MONITOR channel according to the
MONITOR channel protocol. The MONITOR channel (0-7) can be selected by setting the
monitor channel select bit MON_CR.MCS.
4.3.17
Value after reset: FF
MOX
Contains the MONITOR data to be transmitted in IOM-2 MONITOR channel according
to the MONITOR channel protocol.The MONITOR channel (0-7) can be selected by
setting the monitor channel select bit MON_CR.MCS
Data Sheet
7
7
7
MCDA - Monitoring CDA Bits
MOR - MONITOR Receive Channel
MOX - MONITOR Transmit Channel
Bit7
MCDA21
Bit6
H
H
H
Bit7
MCDA20
Monitor Receiver Data
Monitor Transmit Data
Bit6
163
Bit7
MCDA11
Bit6
Detailed Register Description
Bit7
MCDA10
0
0
0
Bit6
PEB 3081
PEF 3081
2000-09-27
WR (5C)
RD (5C)
RD (5B)

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