PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 148

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
4.2.3
Value after reset: FF
AOE
For general information please refer to
OE2-0 ... Output Enable for AUX2 - AUX0
0: Pin AUX2-0 is configured as output. The value of the corresponding bit in the ATX
register is driven on AUX2-0.
1: Pin AUX2-0 is configured as input. The value of the corresponding bit can be read from
the ARX register.
Note: In NT and LT modes the pins AUX0-2 are not available as I/O pins.
4.2.4
Value after reset: (not defined)
ARX
AR2-0 ... Auxiliary Receive
The value of AR2-0 always reflects the level at pin AUX2-0 at the time when ARX is read
by the host even if a pin is configured as output.
Note: In NT and LT modes the pins AUX0-2 are not available as I/O pins.
Data Sheet
7
7
AOE - Auxiliary Output Enable Register
ARX - Auxiliary Interface Receive Register
1
-
H
1
-
1
-
1
-
Chapter
148
1
-
3.8.
OE2
AR2
Detailed Register Description
OE1
AR1
0
0
OE0
AR0
RD/WR (3E)
PEB 3081
PEF 3081
2000-09-27
RD (3F)