PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 65

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

PEB 3081
PEF 3081
Description of Functional Blocks
Preliminary
F5 Unsynchronized
Any signal except INFO 2 or 4 detected on the S/T interface.
F6 Synchronized
The receiver has synchronized and detects INFO 2. INFO 3 is transmitted to
synchronize the NT.
F7 Activated
The receiver has synchronized and detects INFO 4. All user channels are now conveyed
transparently to the IOM-2 interface.
To transfer user channels transparently to the S/T interface either the command AR8 or
AR10 has to be issued and TR_STA.FSYN must be “1” (signal from remote side must
be synchronous).
F8 Lost Framing
The receiver has lost synchronization in the states F6 or F7 respectively.
Unconditional States
Loop A Closed (internal or external)
The SBCX-X loops back the transmitter to the receiver and activates by transmission of
INFO 3. The receiver has not yet synchronized.
For a non transparent internal loop the DIS_TX bit of register TR_CONF2 has to be set
to ’1’.
Loop A Activated (internal or external)
The receiver has synchronized to INFO 3. Data may be sent. The indication “AIL” is
output to indicate the activated state. If the loop is closed internally and the S/T line
awake detector detects any signal on the S/T interface, this is indicated by “RSY”.
Test Mode - SSP
Single alternating pulses are transmitted to the S/T-interface resulting in a frequency of
the fundamental mode of 2 kHz.
Test Mode - SCP
Continuous alternating pulses are transmitted to the S/T-interface resulting in a
frequency of the fundamental mode of 96 kHz.
Data Sheet
65
2000-09-27