PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 134

PEB3081FV14XP

Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3081FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Preliminary
4.1.3
Value after reset: FE
CIX0
CODX0 ... C/I-Code 0 Transmit
Code to be transmitted in the C/I-channel 0.
The code is only transmitted if the TIC bus is occupied. If TIC bus is enabled but
occupied by another device, only “1s” are transmitted.
TBA2-0 ... TIC Bus Address
Defines the individual address for the SBCX-X on the IOM bus.
This address is used to access the C/I- and D-channel on the IOM interface.
Note: If only one device is liable to transmit in the C/I- and D-channels of the IOM it
BAC ... Bus Access Control
Only valid if the TIC-bus feature is enabled (MODED.DIM2-0).
If this bit is set, the SBCX-X will try to access the TIC-bus to occupy the C/I-channel even
if no D-channel frame has to be transmitted. It should be reset when the access has been
completed to grant a similar access to other devices transmitting in that IOM-channel.
Note: Access is always granted by default to the SBCX-X with TIC-Bus Address (TBA2-
4.1.4
Value after reset: FE
CIR1
CODR1 ... C/I-Code 1 Receive
CICW, CI1E ... C/I-Channel Width, C/I-Channel 1 Interrupt Enable
These two bits contain the read back values from CIX1 register (see below).
Data Sheet
should always be given the address value ’7’.
0, STCR register) ’7’, which has the lowest priority in a bus configuration.
7
7
CIX0 - Command/Indication Transmit 0
CIR1 - Command/Indication Receive 1
H
H
CODX0
CODR1
134
TBA2 TBA1 TBA0
Detailed Register Description
CICW CI1E
0
0
BAC
PEB 3081
PEF 3081
2000-09-27
WR (2E)
RD (2F)

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