SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 124

SAA7109EEB

Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7109EEB

Lead Free Status / Rohs Status
Supplier Unconfirmed
Philips Semiconductors
18.1.1
Table 67 I
Table 68 I
Table 69 I
Table 70 I
Table 71 I
Table 72 Explanations of Tables 67 to 71
Notes
1. X is the read/write control bit; X = logic 0 is order to write; X = logic 1 is order to read.
2. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed.
2004 Mar 16
S 1 0 0 0 1 0 0 0 A SUBADDRESS
S 1 0 0 0 1 0 0 0 A FEH
S 1 0 0 0 1 0 0 0 A FFH
S 1 0 0 0 1 0 0 0 A SUBADDRESS
S 1 0 0 0 1 0 0 0 A FEH
S
Sr
1 0 0 0 1 0 0 X; note 1
A
Am
SUBADDRESS; note 2
DATA
--------
P
RAM ADDRESS
PC-CODEC
I
2
C-
2
2
2
2
2
CODE
C-bus write access to control registers; see Table 72
C-bus write access to cursor bit map (subaddress FEH); see Table 72
C-bus write access to colour look-up table (subaddress FFH); see Table 72
C-bus read access to control registers; see Table 72
C-bus read access to cursor bit map or colour LUT; see Table 72
BUS FORMAT
or
FFH
START condition
repeated START condition
slave address
acknowledge generated by the slave
acknowledge generated by the master
subaddress byte
data byte
continued data bytes and acknowledges
STOP condition
start address for RAM access
A RAM ADDRESS
A RAM ADDRESS A Sr 1 0 0 0 1 0 0 1 A DATA 0 Am -------- DATA n Am P
A
RAM ADDRESS
A Sr 1 0 0 0 1 0 0 1
A DATA 0R
124
A
A
DATA 0
DATA 0
DESCRIPTION
A DATA 0
A DATA 0G
A
A
SAA7108E; SAA7109E
--------
Am
--------
A DATA 0B
--------
DATA n
DATA n
Product specification
DATA n
A --------
A
Am
A
P
P
P
P

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