SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 61

SAA7109EEB

Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7109EEB

Lead Free Status / Rohs Status
Supplier Unconfirmed
Philips Semiconductors
2004 Mar 16
PC-CODEC
a. Sources containing 7.5 IRE black level offset (e.g. NTSC M).
CVBS levels with default settings RAWG[7:0] = 64 and RAWO[7:0] = 128.
Equation for modification of the raw data levels via bytes RAWG and RAWO:
It should be noted that the resulting levels are limited to 1 to 254 in accordance with “ ITU Recommendation 601/656” .
CVBS
OUT
=
Int
RAWG
----------------- -
64
255
209
71
60
Fig.26 CVBS (raw data) range for scaler input, data slicer and X port output.
1
CVBS
LUMINANCE
SYNC
nom
128
+
white
black
black shoulder
sync bottom
RAWO
61
255
199
60
1
LUMINANCE
b. Sources not containing black level offset.
SYNC
SAA7108E; SAA7109E
black shoulder = black
white
sync bottom
MGD700
Product specification

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