SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 188
SAA7109EEB
Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7109EEB.pdf
(202 pages)
Specifications of SAA7109EEB
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Philips Semiconductors
Table 231 Horizontal luminance phase offset; register set A [AAH[7:0]] and B [DAH[7:0]]
Table 232 Horizontal chrominance scaling increment; register set A [ACH[7:0]; ADH[7:0]] and B [DCH[7:0]; DDH[7:0]]
Note
1. Bits XSCC[15:13] are reserved and are set to logic 0.
Table 233 Horizontal chrominance phase offset; register set A [AEH[7:0]] and B [DEH[7:0]]
18.2.5.12 Subaddresses B0H to BFH
Table 234 Vertical luminance scaling increment; register set A [B0H[7:0]; B1H[7:0]] and B [E0H[7:0]; E1H[7:0]]
2004 Mar 16
Offset = 0
Offset =
Offset =
Offset =
This value must be set to the
luminance value
This value must be set to
Scale =
Scale =
Scale = 1, equals 1024
Scale =
Scale =
HORIZONTAL LUMINANCE PHASE
VERTICAL LUMINANCE SCALING
PC-CODEC
HORIZONTAL CHROMINANCE
HORIZONTAL CHROMINANCE
SCALING INCREMENT
1024
1024
1024
1
1
32
255
63.999
32
32
PHASE OFFSET
32
pixel
1
1023
1025
INCREMENT
= 1 pixel
(theoretical) zoom
pixel
OFFSET
downscale
1
zoom
downscale
2
XSCY[15:0]
1
2
XPHY[7:0]
XPHC7 XPHC6 XPHC5 XPHC4 XPHC3 XPHC2 XPHC1 XPHC0
XPHY7 XPHY6 XPHY5 XPHY4 XPHY3 XPHY2 XPHY1 XPHY0
XSCC[15:12]
A [ADH[7:4]]
B [DDH[7:4]]
YSCY[15:12]
A [B1H[7:4]]
B [E1H[7:4]]
0
0
0
1
0
0
1
0000
0000
0001
0000
0000
0000
0000
1111
0
0
0
1
0
0
1
(1)
188
A [ADH[3:0]]
B [DDH[3:0]]
A [B1H[3:0]]
B [E1H[3:0]]
XSCC[11:8]
YSCY[11:8]
0
0
1
1
0
0
1
CONTROL BITS 7 TO 0
0000
0000
1111
CONTROL BITS 7 TO 0
0000
0011
0100
0100
1111
CONTROL BITS
CONTROL BITS
0
0
0
1
0
0
1
SAA7108E; SAA7109E
B [DCH[7:4]]
A [ACH[7:4]]
A [B0H[7:4]]
B [E0H[7:4]]
0
0
0
1
XSCC[7:4]
0
0
1
YSCY[7:4]
0000
0000
1111
0000
1111
0000
0000
1111
0
0
0
1
0
0
1
Product specification
B [DCH[3:0]]
A [ACH[3:0]]
A [B0H[3:0]]
B [E0H[3:0]]
0
0
0
1
XSCC[3:0]
0
0
1
YSCY[3:0]
0000
0001
1111
0001
1111
0000
0001
1111
0
1
0
1
0
1
1
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