SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 82

• Manufacturer Part Number: SAA7109EEB
• Manufacturer: NXP Semiconductors

Specifications of SAA7109EEB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Philips Semiconductors
Table 42 Examples for vertical phase offset usage: global equations
2004 Mar 16
handbook, full pagewidth
Upper input lines
Upper input lines
Lower input lines
Lower input lines
INPUT FIELD UNDER
PC-CODEC
Fig.37 Derivation of the phase related equations (example: interlace vertical scaling down to
Offset
A
B
PROCESSING
=
=
1
-- - input line shift
2
1
-- - input line shift
2
=
1024
------------ -
conversion).
32
=
32
+
=
=
1
-- - scale increment
2
field 1
upper
16
1 line shift
INTERPRETED AS
upper output lines
lower output lines
upper output lines
lower output lines
B
A
OUTPUT FIELD
field 2
lower
=
YSCY[15:0]
------------------------------ -
64
+
16
USED ABBREVIATION
UP-UP
UP-LO
LO-UP
LO-LO
case UP-UP
field 1
C
D = no offset = 0
C
=
82
1
-- - scale increment
2
case LO-LO
field 2
D
=
PHO + 16
PHO
PHO
PHO
YSCY[15:0]
------------------------------ -
case UP-LO
CALCULATION (DECIMAL VALUES)
field 1
64
EQUATION FOR PHASE OFFSET
+
+
YSCY[15:0]
------------------------------ -
YSCY[15:0]
------------------------------ -
SAA7108E; SAA7109E
64
64
case LO-UP
field 2
MHB548
+
16
3
Product specification
5
, with field