SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 126

• Manufacturer Part Number: SAA7109EEB
• Manufacturer: NXP Semiconductors

Specifications of SAA7109EEB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Philips Semiconductors
Table 77 Subaddress 1BH
Table 78 Subaddresses 26H and 27H
Table 79 Subaddress 28H
Table 80 Subaddress 29H
2004 Mar 16
MSM
RCOMP
(read only)
GCOMP
(read only)
BCOMP
(read only)
WSS
WSSON
BS
SRES
BE
DATA BYTE
DATA BYTE
DATA BYTE
DATA BYTE
PC-CODEC
LEVEL
LEVEL
LEVEL
LEVEL
LOGIC
LOGIC
LOGIC
LOGIC
0
1
0
1
0
1
0
1
0
1
0
1
monitor sense mode off; RCOMP, GCOMP and BCOMP bits are not valid; default after reset
monitor sense mode on
check comparator at DAC on pin C8 is active, output is loaded
check comparator at DAC on pin C8 is inactive, output is not loaded
check comparator at DAC on pin C7 is active, output is loaded
check comparator at DAC on pin C7 is inactive, output is not loaded
check comparator at DAC on pin C6 is active, output is loaded
check comparator at DAC on pin C6 is inactive, output is not loaded
wide screen signalling bits
wide screen signalling output is disabled; default after reset
wide screen signalling output is enabled
starting point of burst in clock cycles
pin C3 accepts a teletext bit stream (TTX)
pin C3 accepts a sync reset input (SRES)
ending point of burst in clock cycles
3 to 0 = aspect ratio
7 to 4 = enhanced services
10 to 8 = subtitles
13 to 11 = reserved
DESCRIPTION
DESCRIPTION
126
DESCRIPTION
DESCRIPTION
PAL: BS = 33 (21H); default after reset if
strapping pin G1 tied HIGH
NTSC: BS = 25 (19H); default after reset if
strapping pin G1 tied LOW
default after reset
a HIGH impulse resets synchronization of the
encoder (first field, first line)
PAL: BE = 29 (1DH); default after reset if
strapping pin G1 tied HIGH
NTSC: BE = 29 (1DH); default after reset if
strapping pin G1 tied LOW
SAA7108E; SAA7109E
REMARKS
REMARKS
Product specification