SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 151

• Manufacturer Part Number: SAA7109EEB
• Manufacturer: NXP Semiconductors

Specifications of SAA7109EEB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Philips Semiconductors
18.2.2.3
Table 151 Analog input control 1 (AICO1); 02H[7:0]
Note
1. To take full advantage of the Y/C modes 6 to 9 the I
2004 Mar 16
7 and 6 analog function select;
5 and 4 update hysteresis for
3 to 0
PC-CODEC
BIT
(full luminance bandwidth).
Subaddress 02H
see Fig.14
9-bit gain; see Fig.15
mode selection
DESCRIPTION
MODE[3:0]
GUDL[1:0]
FUSE[1:0]
SYMBOL
VALUE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1111
00
01
10
11
00
01
10
11
to
2
C-bus bit BYPS (subaddress 09H, bit 7) should be set to logic 1
151
amplifier plus anti-alias filter bypassed
amplifier active
amplifier plus anti-alias filter active
off
Mode 0: CVBS (automatic gain) from AI11 (pin P13);
see Fig.57
Mode 1: CVBS (automatic gain) from AI12 (pin P11);
see Fig.58
Mode 2: CVBS (automatic gain) from AI21 (pin P10);
see Fig.59
Mode 3: CVBS (automatic gain) from AI22 (pin P9);
see Fig.60
Mode 4: CVBS (automatic gain) from AI23 (pin P7);
see Fig.61
Mode 5: CVBS (automatic gain) from AI24 (pin P6);
see Fig.62
Mode 6: Y (automatic gain) from AI11 (pin P13) + C (gain
adjustable via GAI28 to GAI20) from AI21 (pin P10);
note 1; see Fig.63
Mode 7: Y (automatic gain) from AI12 (pin P11) + C (gain
adjustable via GAI28 to GAI20) from AI22 (pin P9); note 1;
see Fig.64
Mode 8: Y (automatic gain) from AI11 (pin P13) + C (gain
adapted to Y gain) from AI21 (pin P10); note 1; see Fig.65
Mode 9: Y (automatic gain) from AI12 (pin P11) + C (gain
adapted to Y gain) from AI22 (pin P9); note 1; see Fig.66
Modes 10 to 15: reserved
1 LSB
2 LSB
3 LSB
SAA7108E; SAA7109E
FUNCTION
Product specification