SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 128
SAA7109EEB
Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7109EEB.pdf
(202 pages)
Specifications of SAA7109EEB
Lead Free Status / Rohs Status
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Philips Semiconductors
Table 84 Subaddress 3AH
Table 85 Subaddress 54H
Table 86 Subaddresses 55H to 59H
2004 Mar 16
CBENB
SYMP
DEMOFF
CSYNC
Y2C
UV2C
VPSEN
EDGE2
EDGE1
VPS5
VPS11
VPS12
VPS13
VPS14
DATA BYTE
DATA BYTE
DATA BYTE
PC-CODEC
fifth byte of video programming system data
eleventh byte of video programming system data
twelfth byte of video programming system data
thirteenth byte of video programming system data
fourteenth byte of video programming system data
LOGIC
LEVEL
LOGIC
LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
video programming system data insertion is disabled; default after reset
video programming system data insertion in line 16 is enabled
internal PPD2 data is sampled on the rising clock edge
internal PPD2 data is sampled on the falling clock edge; see Tables 25 to 30; default after
reset
internal PPD1 data is sampled on the rising clock edge; see Tables 25 to 30; default after
reset
internal PPD1 data is sampled on the falling clock edge
data from input ports is encoded
colour bar with fixed colours is encoded
horizontal and vertical trigger is taken from FSVGC or both VSVGC and HSVGC; default
after reset
horizontal and vertical trigger is decoded out of “ITU-R BT.656” compatible data at PD port
Y-C
Y-C
pin D8 provides a horizontal sync for non-interlaced VGA components output (at PIXCLK)
pin D8 provides a composite sync for interlaced components output (at XTAL clock)
input luminance data is twos complement from PD input port
input luminance data is straight binary from PD input port; default after reset
input colour difference data is twos complement from PD input port
input colour difference data is straight binary from PD input port; default after reset
B
B
-C
-C
R
R
DESCRIPTION
to RGB dematrix is active; default after reset
to RGB dematrix is bypassed
128
DESCRIPTION
DESCRIPTION
in line 16; LSB first; all other bytes are not
relevant for VPS
SAA7108E; SAA7109E
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