SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 182

• Manufacturer Part Number: SAA7109EEB
• Manufacturer: NXP Semiconductors

Specifications of SAA7109EEB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Philips Semiconductors
Table 214 X port input reference signal definitions; register set A [92H[3:0]] and B [C2H[3:0]]; note 1
Note
1. X = don’t care.
Table 215 I port output format and configuration; register set A [93H[7:5]] and B [C3H[7:5]]; note 1
Note
1. X = don’t care.
2004 Mar 16
XCLK input clock and XDQ input qualifier are needed
Data rate is defined by XCLK only, no XDQ signal used
Data are qualified at XDQ input at logic 1
Data are qualified at XDQ input at logic 0
Rising edge of XRH input is horizontal reference
Falling edge of XRH input is horizontal reference
Reference signals are taken from XRH and XRV
Reference signals are decoded from EAV and SAV
All lines will be output
Skip the number of leading Y only lines, as defined by FOI1 and FOI0
Dwords are transferred byte wise, see subaddress 85H bits ISWP1 and ISWP0
Dwords are transferred 16-bit word wise via IPD and HPD, see subaddress 85H bits
ISWP1 and ISWP0
No ITU 656 like SAV/EAV codes are available
ITU 656 like SAV/EAV codes are inserted in the output data stream, framed by a
qualifier
PC-CODEC
X PORT INPUT REFERENCE SIGNAL DEFINITIONS
I PORT OUTPUT FORMATS AND CONFIGURATION
182
XCODE
X
X
X
X
X
X
0
1
SAA7108E; SAA7109E
CONTROL BITS 3 TO 0
ICODE
XDH
CONTROL BITS 7 TO 5
X
X
X
X
X
X
X
X
X
X
0
1
0
1
Product specification
I8_16
XDQ
X
X
X
X
X
X
X
X
X
X
0
1
0
1
XCKS
FYSK
X
X
X
X
X
X
X
X
X
X
0
1
0
1