SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 89
SAA7109EEB
Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7109EEB.pdf
(202 pages)
Specifications of SAA7109EEB
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Philips Semiconductors
Table 50 Bytes stream of the data slicer
Notes
1. NEP = inverted EP (see note 2).
2. EP = Even Parity of bits 5 to 0.
3. FID = 0: field 1; FID = 1: field 2.
4. I1 = 0 and I0 = 0: before line 1; I1 = 0 and I0 = 1: lines 1 to 23; I1 = 1 and I0 = 0: after line 23; I1 = 1 and I0 = 1:
5. Subaddress 5DH at 3EH and 3FH are used for ITU 656 like SAV/EAV header generation; recommended value.
6. V = 0: active video; V = 1: blanking.
7. H = 0: start of line; H = 1: end of line.
8. DC = Data Count in Dwords according to the data type.
9. OP = Odd Parity of bits 6 to 0.
10. LN = Line Number.
11. DT = Data Type according to table.
2004 Mar 16
DID,
SAV,
EAV
SDID
DC
IDI1
IDI2
CS
BC
NAME
PC-CODEC
NICK
line 24 to end of field.
(8)
subaddress
5DH = 00H
subaddress 5DH;
bit 5 = 1
subaddress 5DH
bit 5 = 3EH; note 5
subaddress 5DH
bit 5 = 3FH; note 5
programmable via
subaddress 5EH
check sum byte
valid byte count
COMMENT
NEP
BIT 7
OP
NEP
NEP
NEP
CS6
OP
OP
1
0
(9)
(1)
LN2
BIT 6
FID
FID
FID
EP
EP
CS6
EP
EP
0
(2)
(2)
(10)
(3)
(3)
(3)
D5[5EH] D4[5EH] D3[5EH] D2[5EH] D1[5EH] D0[5EH]
LN8
LN1
CNT5
BIT 5
DC5
CS5
V
V
89
0
0
(6)
(6)
(10)
(10)
D4[5DH] D3[5DH] D2[5DH] D1[5DH] D0[5DH]
LN7
LN0
CNT4
BIT 4
DC4
CS4
H
H
1
(7)
(7)
(10)
(10)
DT3
LN6
CNT3
BIT 3
DC3
CS3
P3
P3
0
SAA7108E; SAA7109E
(10)
(11)
DT2
LN5
FID
CNT2
BIT 2
DC2
CS2
P2
P2
(10)
(11)
(3)
Product specification
DT1
LN4
CNT1
BIT 1
DC1
CS1
I1
P1
P1
(4)
(10)
(11)
DT0
LN3
CNT0
BIT 0
DC0
CS0
I0
P0
P0
(4)
(10)
(11)
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