SAA7109EEB NXP Semiconductors, SAA7109EEB Datasheet - Page 67
SAA7109EEB
Manufacturer Part Number
SAA7109EEB
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7109EEB.pdf
(202 pages)
Specifications of SAA7109EEB
Lead Free Status / Rohs Status
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Philips Semiconductors
2004 Mar 16
PC-CODEC
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to the following table:
For further information see programming section, Tables 167, 168 and 169.
HREF
F_ITU656
V123
VGATE
FID
NAME
the falling edge of V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field
is EVEN. The specific position of the slope is dependent on the internal processing delay and may change a
few clock cycles from version to version.
single field counting
single field counting
ITU counting
ITU counting
F_ITU656
F_ITU656
V123
VGATE
V123
VGATE
CVBS
HREF
CVBS
HREF
FID
FID
(1)
(1)
RTS0 (PIN K13
X
X
X
X
525
262
262
262
Fig.30 Vertical timing diagram for 60 Hz/525 line systems.
VSTO [ 8:0 ] = 101H
VSTO [ 8:0 ] = 101H
263
263
1
1
RTS1 (PIN L10)
264
2
2
1
265
X
X
X
X
3
3
2
266
4
4
3
267
XRH (PIN N2)
5
5
4
(a) 1st field
(b) 2nd field
67
268
X
6
6
5
269
7
7
6
XRV (PIN L5)
270
8
8
7
X
X
271
SAA7108E; SAA7109E
9
9
8
272
10
10
9
. ..
. ..
...
...
VSTA [ 8:0 ] = 011H
VSTA [ 8:0 ] = 011H
Product specification
284
21
21
21
285
MHB541
22
22
22
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