MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 105

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
8.5 Programming the FLASH EEPROM
Programming the FLASH EEPROM is accomplished by this step-by-step procedure. The V
must be at the proper level prior to executing step 4 the first time.
The flowchart in
Freescale Semiconductor
10. If the location is programmed, repeat the same number of pulses as required to program the
11. Read the address location to verify that it remains programmed.
12. Clear LAT.
13. If there are more locations to program, repeat steps 2 through 10.
14. Turn off V
1. Apply program/erase voltage to the V
2. Clear ERAS and set the LAT bit in the FEECTL register to establish program mode and enable
3. Write data to a valid address. The address and data are latched. If BOOTP is asserted, an attempt
4. Apply programming voltage by setting ENPE.
5. Delay for one programming pulse, t
6. Remove programming voltage by clearing ENPE.
7. Delay while high voltage is turning off, t
8. Read the address location to verify that it has been programmed,
9. If the location is not programmed, repeat steps 4 through 7 until the location is programmed or until
programming address and data latches.
to program an address in the boot block will be ignored.
the specified maximum number of program pulses, n
location. This provides 100 percent program margin.
FP
Figure 8-5
. Reduce voltage on V
demonstrates the recommended programming sequence.
M68HC12B Family Data Sheet, Rev. 9.1
FP
PPULSE
FP
pin to V
VPROG
pin.
.
DD
.
.
PP
, has been reached.
Programming the FLASH EEPROM
FP
pin voltage
105

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