MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 194

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Serial Interface
14.2.3 SCI Register Descriptions
Control and data registers for the SCI subsystem are described here. The memory address indicated for
each register is the default address that is in use after reset. The entire 512-byte register block can be
mapped to any 2-Kbyte boundary within the standard 64-Kbyte address space.
14.2.3.1 SCI Baud Rate Control Register
Read: Anytime
Write: SBR12–SBR0 anytime; low-order byte must be written for change to take
SC0BDH and SC0BDL are considered together as a 16-bit baud rate control register.
The value in SBR12–SBR0 determines the baud rate of the SCI. The desired baud rate is determined by
the following formula:
Which is equivalent to:
BR is the value written to bits SBR12–SBR0 to establish the baud rate.
BTST — Reserved for test function
BSPL — Reserved for test function
BRLD — Reserved for test function
194
SCI baud rate
BR
effect — SBR15–SBR13 only in special modes
=
------------------------------------------------- -
16
Address:
Address:
The baud rate generator is disabled until the TE or RE bit in SC0CR2
register is set for the first time after reset and/or the baud rate generator is
disabled when SBR12–SBR0 = 0.
×
SCI baud rate
Reset:
Reset:
Read:
Write:
Read:
Write:
MCLK
=
Figure 14-3. SCI Baud Rate Control Register (SC0BDH)
-------------------- -
16
Figure 14-4. SCI Baud Rate Control Register (SC0BDL)
$00C0
$00C1
MCLK
SBR7
BTST
Bit 7
Bit 7
×
0
0
BR
BSPL
SBR6
M68HC12B Family Data Sheet, Rev. 9.1
6
0
6
0
BRLD
SBR5
5
0
5
0
NOTE
SBR12
SBR4
4
0
4
0
SBR11
SBR3
3
0
3
0
SBR10
SBR2
2
0
2
1
SBR9
SBR1
1
0
1
0
Freescale Semiconductor
SBR8
SBR0
Bit 0
Bit 0
0
0