MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 187

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
13.4.26 Modulus Down-Counter Count Registers
Read: Anytime
Write: Anytime
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give different results than accessing them as a word. If the RDMCL bit in MCCTL
register is cleared, reads of the MCCNT register will return the present value of the count register. If the
RDMCL bit is set, reads of the MCCNT will return the contents of the load register.
If a $0000 is written into MCCNT and modulus counter while LATQ and BUFEN in ICSYS ($AB) register
are set, the input capture and pulse accumulator registers will be latched. With a $0000 write to the
MCCNT, the modulus counter will stay at 0 and does not set the MCZF flag in MCFLG register.
If modulus mode is enabled (MODMC = 1), a write to this address will update the load register with the
value written to it. The count register will not be updated with the new value until the next counter
underflow. The FLMC bit in MCCTL ($A6) can be used to immediately update the count register with the
new value if an immediate load is desired.
If modulus mode is not enabled (MODMC = 0), a write to this address will clear the prescaler and will
immediately update the counter register with the value written to it and down-counts once to $0000.
13.4.27 Timer Input Capture Holding Registers
Freescale Semiconductor
Address: $00B6
Address: $00B7
Address: $00B8
Address: $00B9
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 13-50. Modulus Down-Counter Count Registers (MCCNT)
Figure 13-51. Timer Input Capture Holding Register 0 (TC0H)
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
0
0
Bit 14
Bit 14
Bit 6
Bit 6
6
1
6
1
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
Bit 13
Bit 13
Bit 5
Bit 5
5
1
5
1
5
0
5
0
Bit 12
Bit 12
Bit 4
Bit 4
4
1
4
1
4
0
4
0
Bit 11
Bit 11
Bit 3
Bit 3
3
1
3
1
3
0
3
0
Bit 10
Bit 10
Bit 2
Bit 2
2
1
2
1
2
0
2
0
Bit 9
Bit 1
Bit 9
Bit 1
1
1
1
1
1
0
1
0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
1
1
0
0
Timer Registers
187

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