MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 154

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Standard Timer (TIM)
12.3.13 Timer Test Register
Read: Anytime
Write: Only in special mode (SMODN = 0)
TCBYP — Timer Divider Chain Bypass Bit
PCBYP — Pulse Accumulator Divider Chain Bypass Bit
12.3.14 Timer Port Data Register
Read: Anytime; inputs return pin level; outputs return pin driver input level
Write: Data stored in an internal latch; drives pins only if configured for output
154
0 = Normal operation
1 = 16-bit free-running timer counter is divided into two 8-bit halves and the prescaler is bypassed.
0 = Normal operation
1 = 16-bit pulse accumulator counter is divided into two 8-bit halves and the prescaler is bypassed.
The clock drives both halves directly.
The clock drives both halves directly.
Address: $00AD
Address: $00AE
Writes do not change pin state when the pin is configured for timer output.
The minimum pulse width for pulse accumulator input should always be
greater than two module clocks due to input synchronizer circuitry. The
minimum pulse width for the input capture should always be greater than
the width of two module clocks due to input synchronizer circuitry.
Reset:
Reset:
Timer:
Read:
Read:
Write:
Write:
PA:
I/OC7
Bit 7
Bit 7
PT7
PAI
0
0
0
Figure 12-28. Timer Port Data Register (PORTT)
Figure 12-27. Timer Test Register (TIMTST)
= Unimplemented
I/OC6
PT6
6
0
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
I/OC5
PT5
5
0
0
5
0
NOTE
I/OC4
PT4
4
0
0
4
0
I/OC3
PT3
3
0
0
3
0
I/OC2
PT2
2
0
0
2
0
TCBYP
I/OC1
PT1
1
0
1
0
Freescale Semiconductor
PCBYP
I/OC0
Bit 0
Bit 0
PT0
0
0