MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 315

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

19.12.1 Programming Voltage Supply Envelope
The key to preventing damage to the FLASH array or corruption of the data contained in the memory is
the programming voltage envelope shown in
experience with FLASH devices are due to a failure to ensure that their voltage sources always meet
these requirements.
The most important single thing to remember from this diagram is that V
the same level, except during an actual program or erase cycle. Corruption of FLASH data is often
encountered when V
Conversely, if V
array can occur.
Freescale Semiconductor
Although
the normal read phase, V
V
V
FP
DD
FP
is allowed to fall below 0.35 volts lower than V
. For example, If the operating voltage of V
can be no lower than 4.85 volts.
–0.30 V
FP
13.5 V
12.6 V
11.4 V
4.15 V
5.5 V
4.5 V
0 V
is allowed to exceed V
Figure 19-1
POWER
Figure 19-1. Programming Voltage Envelope
UP
M68HC12B Family Data Sheet, Rev. 9.1
shows a lower boundary of 4.15 volts on V
NORMAL
FP
READ
always must be no more than .35 volts below
Figure
DD
NOTE
during the power-up and power-down phases.
PROGRAM
ERASE
19-1. Many of the problems that customers
30 ns MAXIMUM
DD
in the system is 5.2 volts,
POWER
DOWN
DD
t
ER
V
V
COMBINED V
at any time, damage to the FLASH
FP
DD
ENVELOPE
ENVELOPE
FP
and V
FLASH EEPROM Characteristics
DD
AND V
FP
DD
during
FP
should always be at
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