MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 259

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

SRR — Substitute Remote Request Bit
IDE — ID Extended Flag
Freescale Semiconductor
Note 1. x is 4, 5, 6, or 7 depending on which buffer, RxFG, Tx0, Tx1, or Tx3, respectively.
Note 1. x is 4, 5, 6, or 7 depending on which buffer, RxFG, Tx0, Tx1, or Tx3, respectively.
Addr.
Addr.
$01x0
$01x1
$01x2
$01x3
$01x0
$01x1
$01x2
$01x3
This fixed recessive bit is used only in extended format. It must be set to 1 by the user for transmission
buffers and will be stored as received on the CAN bus for receive buffers.
This flag indicates whether the extended or standard identifier format is applied in this buffer. In case
of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In case of a transmit buffer the flag indicates to the msCAN12 what type of identifier
to send.
(1)
(1)
0 = Standard format (11 bit)
1 = Extended format (29 bit)
Identifier Register 0 (IDR0)
Identifier Register 1 (IDR1)
Identifier Register 2 (IDR2)
Identifier Register 3 (IDR3)
Identifier Register 0 (IDR0)
Identifier Register 1 (IDR1)
Identifier Register 2 (IDR2)
Identifier Register 3 (IDR3)
Register Name
Register Name
Figure 16-12. Identifier Mapping in the Extended Format
Figure 16-11. Identifier Mapping in the Standard Format
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
M68HC12B Family Data Sheet, Rev. 9.1
Bit 7
ID10
Bit 7
ID28
ID20
ID14
ID2
ID6
ID27
ID19
ID13
ID9
ID1
ID5
6
6
ID26
ID18
ID12
ID8
ID0
ID4
5
5
Undefined out of reset
Undefined out of reset
Undefined out of reset
Undefined out of reset
Undefined out of reset
Undefined out of reset
Undefined out of reset
Undefined out of reset
RTR
ID25
SRR
ID11
ID7
ID3
4
4
Programmer’s Model of Message Storage
ID24
ID10
IDE
IDE
ID6
ID2
3
3
= Unimplemented
ID23
ID17
ID5
ID9
ID1
2
2
ID22
ID16
ID4
ID8
ID0
1
1
Bit 0
Bit 0
ID21
ID15
RTR
ID3
ID7
259