MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 266

• Manufacturer Part Number: MC68HC912B32VFU8
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC912B32VFU8

• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

The bit time is determined by the oscillator frequency, the baud rate prescaler, and the number of time
quanta (Tq) clock cycles per bit (as shown in
16.12.5 msCAN12 Receiver Flag Register
All bits of this register are read and clear only. A flag can be cleared by writing a 1 to the corresponding
bit position. A flag can be cleared only when the condition which caused the setting is valid no longer.
Writing a 0 has no effect on the flag setting. Every flag has an associated interrupt enable flag in the
CRIER register. A hard or soft reset will clear the register.
WUPIF — Wakeup Interrupt Flag
RWRNIF — Receiver Warning Interrupt Flag
TWRNIF — Transmitter Warning Interrupt Flag
1. Condition to set the flag: RWRNIF = (96 ≤ REC ≤ 127) & RERRIF & TERRIF & BOFFIF
2. Condition to set the flag: TWRNIF = (96 ≤ TEC ≤ 127) & RERRIF & TERRIF & BOFFIF
266
msCAN12 Controller
If the msCAN12 detects bus activity while in sleep mode, it sets the WUPIF flag. If not masked, a
wakeup interrupt is pending while this flag is set.
This flag is set when the msCAN12 goes into warning status due to the receive error counter (REC)
exceeding 96 and neither one of the error interrupt flags nor the bus-off interrupt flag is set
masked, an error interrupt is pending while this flag is set.
This bit will be set when the msCAN12 goes into warning status due to the transmit error counter (TEC)
exceeding 96 and neither one of the error interrupt flags nor the bus-off interrupt flag is set
masked, an error interrupt is pending while this flag is set.
0 = No wakeup activity has been observed while in sleep mode.
1 = msCAN12 has detected activity on the bus and requested wakeup.
0 = No receiver warning status has been reached.
1 = msCAN12 went into receiver warning status.
0 = No transmitter warning status has been reached.
1 = msCAN12 went into transmitter warning status.
Address: $0104
The CBTR1 register can be written only if the SFTRES bit in CMCR0 is set.
Reset:
Read:
Write:
Figure 16-20. msCAN12 Receiver Flag Register (CRFLG)
WUPIF
Bit 7
0
BitTime
RWRNIF
6
0
=
M68HC12B Family Data Sheet, Rev. 9.1
Presc
-------------------------------------- - number
f
CGMCANCLK
TWRNIF
Þ
5
0
value
Table
NOTE
RERRIF
•
4
0
16-8).
TERRIF
Þ
3
0
of
Þ
TimeQuanta
BOFFIF
2
0
OVRIF
1
0
Freescale Semiconductor
Bit 0
RXF
0
(1)
(2)
. If not
. If not