MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 277

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Chapter 17
Analog-to-Digital Converter (ATD)
17.1 Introduction
The ATD is an 8-channel, 10-bit, multiplexed-input, successive-approximation, analog-to-digital
converter, accurate to ± 2 least significant bit (LSB). It does not require external sample and hold circuits
because of the type of charge redistribution technique used. The ATD converter timing is synchronized
to the system P clock. The ATD module consists of a 16-word (32-byte) memory-mapped control register
block used for control, testing, and configuration.
17.2 Functional Description
A single conversion sequence consists of four or eight conversions, depending on the state of the select
8-channel mode (S8CM) bit when ATDCTL5 is written. There are eight basic conversion modes. In the
non-scan modes, the SCF bit is set after the sequence of four or eight conversions has been performed
and the ATD module halts. In the scan modes, the SCF bit is set after the first sequence of four or eight
conversions has been performed, and the ATD module continues to restart the sequence. In both modes,
the CCF bit associated with each register is set when that register is loaded with the appropriate
conversion result. That flag is cleared automatically when that result register is read. The conversions are
started by writing to the control registers.
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor
277

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