MC68HC912B32VFU8 Freescale Semiconductor, MC68HC912B32VFU8 Datasheet - Page 197

MC68HC912B32VFU8

Manufacturer Part Number
MC68HC912B32VFU8
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC912B32VFU8

Cpu Family
HC12
Device Core Size
16b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
1KB
# I/os (max)
63
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32VFU8
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
14.2.3.3 SCI Control Register 2
Read: Anytime
Write: Anytime
TIE — Transmit Interrupt Enable Bit
TCIE — Transmit Complete Interrupt Enable Bit
RIE — Receiver Interrupt Enable Bit
ILIE — Idle Line Interrupt Enable Bit
TE — Transmitter Enable Bit
RE — Receiver Enable Bit
RWU — Receiver Wakeup Control Bit
SBK — Send Break Bit
Freescale Semiconductor
As long as SBK remains set, the transmitter sends 0s. When SBK is changed to 0, the current frame
of all 0s is finished before the TxD line goes to the idle state. If SBK is toggled on and off, the transmitter
sends only 10 (or 11) 0s and then reverts to mark idle or sending data.
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF status flag or OR status flag is set
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (port S
0 = Receiver disabled
1 = Enables the SCI receive circuitry
0 = Normal SCI receiver
1 = Enables the wakeup function and inhibits further receiver interrupts. Normally, hardware wakes
0 = Break generator off
1 = Generate a break code, at least 10 or 11 contiguous 0s.
bit 1) is dedicated to the transmitter. The TE bit can be used to queue an idle preamble.
the receiver by automatically clearing this bit.
Address:
Reset:
Read:
Write:
$00C3
Bit 7
TIE
0
Figure 14-6. SCI Control Register 2 (SC0CR2)
TCIE
M68HC12B Family Data Sheet, Rev. 9.1
6
0
RIE
5
0
ILIE
4
0
TE
3
0
RE
Serial Communication Interface (SCI)
2
0
RWU
1
0
Bit 0
SBK
0
197

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