TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 137

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

3.8.7
control register. Each bit can be set individually for input or output. Resetting sets P90 to
P92 to input port and all bits of output latch to”1”.
(1) Port 90 (TXD0), Port 91 (RXD0), Port 92 (SCLK0,
Port 9 (P90 to P92, P96, P97)
P90 to P92 are 3-bit general-purpose I/O port. I/O can be set on a bit basis using the
P96 to P97 are 2-bit general-purpose input port.
Writing “1” the corresponding bits of P9FC enables the respective functions.
Resetting resets the P9FC to “0”, and sets all bits to input ports.
TXD1output
SIO1. SIO0 and SIO1 functions are also used as PP3 to PP5 pins. When selecting SIO0
function (using Port 9 or Port P), set P9FC2<P93F2, P94F2, P95F2>. And when
selection SIO1 function (using Port 9 or Port P), set PPFC2<PP4F2, PP5F2, PP6F2>.
Ports 90 to 92 are general-purpose I/O port. They are also function as either SIO0 or
output
TXD0
P9FC2<P93F2>
(on bit basis)
(on bit basis)
Output latch
P9CR write
P90
P91
P92
A
B
Direction
Function
P9FCwrite
P9 write
Selector
control
control
P9 read
Reset
S
S
(Clock input or output)
(SIO0 module)
SCLK0, SCLK1
(Data output)
RXD0, RXD1
TXD0, TXD1
SIO mode
(Data input)
Figure 3.8.14 P90
A
B
Selector
Selector
92CF29A-135
S
S
A
B
UART, IrDA mode
(SIO0 module)
(Clear to send)
(Data output)
CTS
(Data input)
Open-drain
possible
P9FC2<P90F2>
TXD0
RXD0
0
,
CTS )
CTS
1
0
P90 (TXD0, TXD1)
TMP92CF29A
2009-06-11