TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 196

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

(6) Timing adjustment function for control signals
TAC:The delay from A23-A0 to CSn, CSZx, CSXx, R/W.
TCWS:The delay from CSn to WRxx,SRWR,SRxxB.
TCWH:The delay from WRxx,SRWR,SRxxB to CSn.
TCRH:The delay from RD,SRxxB to CSn.
CSTMGCR<TxxSEL1:TxxSEL0>, WRTMGCR<TxxSEL1:TxxSEL0>
CSTMGCR<TAC1:TAC0>
WRTMGCR<TCWS/H1:TCWS/H0>
RDTMGCR0/1<BnTCRH1:BnTCRH0>
time requirements of memories.
signals (generated in a write cycle), their timing can be adjusted for only one CS space. As
for the
individually for each of all CS spaces. As for the CS and EX spaces for which the timing
adjustment is not performed, the buses connected to them operate with basic bus timing.
(Refer to (7).)
CSn
This function allows for the timing adjustment of the rising and falling edges of the
As for the
This function can not be used while the BnCSH<BnREC> bit is enabled.
The control signals of SDRAM can be adjusted by setting up the SDRAM controller.
,
CSZx
RD
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
,
CSXx
and
CSn
, R/
SRxxB
,
CSZx
W
,
signals (generated in a read cycle), their timing can be adjusted
,
RD
Change the bus timing for CS0 space
Change the bus timing for CS1 space
Change the bus timing for CS2 space
Change the bus timing for CS3 space
CSXx
TAC = 0 × 1/f
TAC = 1 × 1/f
TAC = 2 × 1/f
Reserved
TCWS/H = 0.5 × 1/f
TCWS/H = 1.5 × 1/f
TCWS/H = 2.5 × 1/f
TCWS/H = 3.5 × 1/f
TCRH = 0 × 1/f
TCRH = 1 × 1/f
TCRH = 2 × 1/f
TCRH = 3 × 1/f
,
WRxx
and R/
92CF29A-194
,
SRWR
SYS
SYS
SYS
SYS
SYS
SYS
SYS
W
(Default)
signals, and also for the
and
(Default)
SYS
SYS
SYS
SYS
(Default)
SRxxB
signals based on the setup and hold
WRxx
,
SRWR
TMP92CF29A
2009-06-11
and
SRxxB