TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 585

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

3.21.3
P96/INT4 pin
touched onto the touch screen and until the pen-touch is detected.
an X/Y position measuring procedure is terminated, return to this procedure to wait for the
next touch.
three switches (SMY, SPX, SMX) to OFF. At this time, the pull-down resistor built in the
P96/INT4/PX pin is set ON.
connected, the P96/INT4/PX pin is set to Low by the internal pull-down resistor (PXD),
generating no INT4 interrupt.
screen are connected, which sets the P96/INT4/PX pin to High and generates an INT4
interrupt.
as shown below is provided. Setting debounce time in the TSICR1 register ignores pulses
whose time equals to or is below the set time.
and then captures the signal into the inside after counting. When the signal turns to “L”
during counting, the counter is cleared, starting to wait for a rising edge again.
Touch detection procedure
The touch detection procedure includes the procedure starting from when the pen is
Touching the screen generates the interrupt (INT4) and terminates this procedure. After
When waiting for a touch with no contact, set only the SPY switch to ON and set all other
In this state, because the internal X- and Y-direction resistors in the touch screen are not
When a next pen-touch is given, the X- and Y-direction internal resistors in the touch
To avoid generating more than one INT4 interrupt by one pen-touch, the debounce circuit
The debounce circuit detects a rising of signal to count up a set debounce counter time
Figure 3.21.3 Block diagram of debounce circuit
Debounce circuit
TSICR1
92CF29A-583
TSICR0<TWIEN>, IIMC<I4EDGE>,
And select the Rising
or Falling of INT4
F/F
Enables INT4,
TMP92CF29A
2009-06-11
TSICR0
<PTST>
INT4