TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 331

• Manufacturer Part Number: TMP92xy29FG
• Manufacturer: Toshiba

Specifications of TMP92xy29FG

• Package: QFP176
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 98
• Power Supply Voltage(v): 3.0 to 3.6

(9) Transmission controller
Transmission Buffer is output one bit at a time to the TXD0 pin on the rising edge
or falling of the shift clock which is output on the SCLK0 pin, according to the
SC0CR<SCLKS> setting.
In SCLK Input Mode with the setting SC0CR<IOC> = “1”, the data in the
Transmission Buffer is output one bit at a time on the TXD0 pin on the rising or
falling edge of the SCLK0 input, according to the SC0CR<SCLKS> setting.
Buffer, transmission starts on the rising edge of the next TXDCLK.
• In I/O Interface Mode
• In UART Mode
In SCLK Output Mode with the setting SC0CR<IOC> = “0”, the data in the
When transmission data sent from the CPU is written to the Transmission
92CF29A-329
TMP92CF29A
2009-06-11