TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 693
TMP92xy29FG
Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY29FG.pdf
(764 pages)
Specifications of TMP92xy29FG
Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
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Symbol
P1CR
P6CR
P7CR
P1FC
P4FC
P5FC
P6FC
P7FC
(1) I/O ports (3/11)
PORT1
control
register
PORT1
function
register
PORT4
function
register
PORT5
function
register
PORT6
control
register
PORT6
function
register
PORT7
control
register
PORT7
function
register
Name
Address
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
(Prohibit
001AH
001BH
001EH
001FH
0006H
0007H
0013H
0017H
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
RMW)
P17C
P67C
P47F
P57F
P67F
0/1
0/1
0/1
7
−
−
−
−
−
0
0
0: Input port,
1:Output port
0: Port
1:
WAIT
WAIT
P16C
P66C
P76C
P46F
P56F
P66F
P76F
0/1
0/1
0/1
6
−
−
−
−
−
−
−
0
0
0
0
92CF29A-691
0: Input port,
1: Output
0: Port
1:NDR/
R/ W
NDR/
port, R/
0: Port
P15C
P45F
P55F
P65C
P65F
P75C
P75F
0: Port
0: Port
0/1
0/1
0/1
5
0
−
−
−
0
−
−
0
−
0
−
B
B
,
W
0: Input
0: Input port
1: Output
0:Port
1: EA25
0: Input
port,
EA25
P14C
P64C
P74C
P44F
P54F
P64F
P74F
1: Address bus (A16 to A23)
1: Address bus (A8 to A15)
0/1
0/1
0/1
1: Address bus (A0 to A7)
4
−
−
0
−
−
−
0
−
−
0
0
W
W
W
W
W
W
0: Input port
1: Output
0:Port
1: EA24
1: Output
1:Output
port,
EA24
P73C
P13C
P63C
P73F
P43F
P53F
P63F
0/1
0/1
0/1
3
0
−
−
−
0
−
−
0
−
0
−
W
0: Input port
1: Output
0: Port
1:
<P72> = 0,
<P72> = 1
WRLU
NDWE
port,
<P72> = 0,
<P72> = 1
NDWE @
WRLU
P12C
P42F
P52F
P62C
P62F
P72C
P72F
0/1
0/1
0/1
2
0
−
−
−
0
−
−
0
−
0
−
@
@
@
0: Input port
1: Output
0: Port
1:
<P71> = 0,
<P71> = 1
WRLL
port,
<P71> = 0,
<P71> = 1
NDRE @
WRLL @
NDRE
P11C
P61C
P71C
P41F
P51F
P61F
P71F
0/1
0/1
0/1
1
0
−
−
−
0
−
−
0
−
0
−
TMP92CF29A
@
@
2009-06-11
0: Port
1:Data bus
0: Port
1: RD
(D8 to D15)
P10C
P60C
P70F
P40F
P50F
P60F
P1F
0/1
0/1
0/1
0/1
0/1
W
0
0
−
−
−
−
0
−
−
−
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