TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 179
TMP92xy29FG
Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY29FG.pdf
(764 pages)
Specifications of TMP92xy29FG
Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
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3.8.21
output. Resetting sets ports X5 to input port and output latch to “0”.
clock input pin (X1USB) and dividing clock output of X1 and X2 oscillation clock
system clock output pin (CLKOUT) and as an output pin (LDIV).
Port X (PX4, PX5)
CLKOUT output
Port X5 is 1-bit general-purpose I/O ports. Each bit can be set individually for input or
In addition to functioning as general-purpose I/O port, PX5 can also function as the USB
Setting in the corresponding bits of PXCR and PXFC enables the respective functions.
Port X4 is 1-bit general-purpose output port. Resetting sets output latch to “0”.
In addition to functioning as general-purpose output port, PX4 can also function as a
Setting in the corresponding bits of PX and PXFC enables the respective functions.
LDIV output
PX read
(on bit basis)
Output latch
Function
Reset
control
PXFC write
PX write
R
A
B
Selector
S
Figure 3.8.56 Port X4
92CF29A-177
A
Selector
B
S
PX4 (CLKOUT)
(LDIV)
TMP92CF29A
2009-06-11
(X1D4).
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